Vivid Resourcing

office • BEL • senior • Не указана

**DIGITAL IC DESIGN ENGINEER - LEUVEN (BELGIUM) - PERMANENT POSITION** We are looking for a Digital IC Design Engineer with a strong focus on RTL development to join an innovative semiconductor engineering team working on the design and development of advanced integrated circuits. In this role, you will be responsible for translating architectural specifications into high-quality RTL designs, contributing to the development of complex digital systems from initial concept through to implementation and verification. You will work closely with colleagues across architecture, verification, physical design and validation to ensure robust, efficient and high-performance silicon solutions. This is an opportunity to work on challenging ASIC development projects, taking ownership of key design blocks while contributing to the development of next-generation semiconductor technologies. **Key Responsibilities** * Develop, implement and maintain RTL designs using Verilog and SystemVerilog. * Translate architectural specifications and design requirements into synthesizable RTL. * Contribute to microarchitecture definition and design documentation. * Optimise RTL for performance, power consumption and area (PPA). * Collaborate with verification engineers to support functional verification and debugging. * Work closely with synthesis and physical design teams to ensure successful implementation. * Perform RTL simulation, debugging and design reviews. * Support the full ASIC development lifecycle, from specification through to silicon validation. * Identify and resolve design issues, ensuring quality and reliability throughout development. **Requirements** * Master's degree in Electronics Engineering, Electrical Engineering, Computer Science or a related discipline. * Experience in Digital IC Design, with a strong focus on RTL development. * Strong proficiency in Verilog and/or SystemVerilog. * Good understanding of digital design principles, logic design and microarchitecture. * Experience with RTL simulation, debugging and functional verification methodologies. * Familiarity with ASIC design flows, including synthesis and physical implementation. * Knowledge of timing constraints, clock domains and low-power design techniques is advantageous. * Experience with industry-standard EDA tools is beneficial. * Strong analytical and problem-solving skills, with the ability to work effectively within a multidisciplinary engineering team. **The Offer:** * A permanent, full-time employment contract * A salary & benefits package commensurate with experience Please send over your CV to tom.walker@vividresourcing.com or call me on +32 (0) 3 318 00 74. As always, we are open to recommendations, so please feel free to pass this on to other suitable candidates.