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DSJ Global

Senior ASIC/SoC Design Engineer (M/F/D)

office • BEL • senior • Не указана
The Opportunity An international technology organisation is looking for an experienced **Senior Digital ASIC/SoC Design Engineer** to join a specialist semiconductor R&D team in Belgium. This is a hands-on technical position focused on the development of **digital and mixed-signal ASICs**, working across multiple stages of the IC development lifecycle. You'll contribute to complex custom silicon from initial requirements and architecture through **RTL design, verification, implementation and silicon delivery**, collaborating closely with analogue, systems, verification, physical design and other engineering functions. Key Responsibilities * Design and develop digital IP, modules and subsystems for custom ASICs. * Translate system-level requirements into robust digital architectures and RTL implementations. * Develop high-quality, synthesizable RTL using **VHDL, Verilog and/or SystemVerilog**, depending on project requirements. * Contribute to design verification, integration and debugging activities. * Support ASIC development through synthesis, timing closure and physical implementation. * Perform and support design-quality activities such as **linting, CDC and static timing analysis**. * Consider **power, performance and area** throughout the design process. * Work closely with analogue and mixed-signal engineers on complex system-on-chip designs. * Participate in design reviews and contribute to technical documentation. * Support designs through implementation, validation and eventual silicon release. * Help improve internal design methodologies, tools and engineering processes. * Provide technical input and knowledge-sharing across the wider engineering team. Requirements * Several years of commercial experience in **digital ASIC, SoC or IC design**. * Strong hands-on RTL design experience. * Experience with languages such as **VHDL, Verilog and/or SystemVerilog**. * Good understanding of the ASIC development flow, from specification through RTL, verification, synthesis and implementation. * Knowledge of **synthesis, static timing analysis, CDC and digital design verification**. * Experience working with modern semiconductor design and EDA environments. * Understanding of low-power digital design techniques would be advantageous. * Experience working on mixed-signal ASICs or alongside analogue engineering teams would be valuable. * Strong problem-solving skills and the ability to take ownership of technically complex design blocks. * Comfortable working within multidisciplinary and international engineering teams. Apply Directly today!