FPGA Design Verification Intern

Job Details:

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Job Description:

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Altera is responsible for High-Speed Protocol IP development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA validation and debugging.

As an FPGA Design Verification Intern, You will be responsible for verifying Altera IPs such as PCIe, Ethernet, Search and DR.

Key responsibilities include:

• Help in Design, Verification and hardware debug/bring-up of features
• Scripting DV development flow and automation
• IP releases and rollout support
• Interactions with local and remote teams as well as customers
• Regression triaging, debug and bug closures

Our compensation is designed to reflect the Canadian labour market. The actual ...

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