Staff Hardware Engineer, Optics
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
The Cloud Platform Optics team builds high-speed optical platforms that combine silicon photonics, transmit and receive amplifiers, controller ASICs, Marvell DSPs, and embedded firmware. This work sits within Marvell’s broader AI interconnect portfolio, which spans scale-out networking across racks and clusters, scale-up connectivity between accelerators, and scale-in connectivity between dies and chiplets inside a package.
You’ll own the electrical design of an optical module or a defined subsystem and spend hands-on time in the lab bringing it to life. You’ll work directly with the engineers who design the DSP, photonics, and firmware, see how your board decisions affect link performance and power, and carry your design from the first prototype through new product introduction (NPI).
What You Can Expect
- Design the hardware you’ll bring up. Translate platform requirements into schematics, component selections, and PCB layout constraints for power delivery, clocking, control interfaces, and high-speed signal paths.
- Take first silicon and boards from power-on to a working link. Set up the bench, verify rail voltages and sequencing, check clocks and resets, establish register access, and debug the electrical and optical interfaces alongside firmware and photonics engineers.
- Measure performance against a defined specification. Set pass/fail limits for metrics such as rail ripple, module power, bit error rate (BER), and link margin. Run tests across relevant voltage, temperature, and operating conditions, then document margin to spec and where it breaks down.
- Close the loop on hardware failures. Reproduce intermitt...
Lorem ipsum dolor sit amet, consectetur adipiscing elit. Sed do eiusmod tempor incididunt ut labore et dolore magna aliqua. Ut enim ad minim veniam, quis nostrud exercitation ullamco laboris nisi ut aliquip ex ea commodo consequat. Duis aute irure dolor in reprehenderit in voluptate velit esse cillum dolore eu fugiat nulla pariatur. Excepteur sint occaecat cupidatat non proident, sunt in culpa qui officia deserunt mollit anim id est laborum.
Sed ut perspiciatis unde omnis iste natus error sit voluptatem accusantium doloremque laudantium, totam rem aperiam, eaque ipsa quae ab illo inventore veritatis.