Senior Staff Engineer, SOC Design
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Advancing the World’s Technology Together
Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.
We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.
Senior Staff Engineer, SOC Design
What You’ll Do
The DRAM Development Lab (DDL) is part of Samsung’s Memory Business Unit, the industry's technology and volume leader in DRAM, HBM and NAND Flash. DDL’s vision is to solve key problems of Cloud & Data center by developing the new technology for memory and storage. The SOC team within DDL focuses on the development of silicon solutions. We are an integral part of Samsung’s strong R&D focus & lab innovation engine. We work closely with development teams to bring feature innovation to product roadmaps.
Come join the team that is creating new computing system architectures needed to support emerging machine learning applications, data analytics and edge computing. You’ll focus on enhancement of memory and storage capability by developing prototype and production controllers.
Job ID: 43022
Location: Daily onsite presence at our San Jose or Folsom office in alignment with our Flexible Work policy
- Participate in architectural definitions and responsible for micro architecture of subsystem and/or chip level.
- Responsible for top integration, logic design and RTL implementation along with quality check (Assertion, Lint, CDC, and STA).
- Reviews 3rd party IPs including ARM cores, DDR controller, and UCIe PHY
- Responsible for integrating the third part IPs and sub system at top level
- Work closely with architects and verification engineers to ensure sound design at SoC level.
- Work with physical designers on timing c...
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