Silicon Packaging Design Engineer

Job Details:

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Job Description:

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The Opportunity

Join Intel's advanced packaging team and help shape the future of high-performance computing. As a Silicon Packaging Design Engineer, you will be responsible for the design and development of next-generation package substrates that enable industry-leading semiconductor products. Working closely with silicon, signal integrity, power delivery, manufacturing, and hardware teams, you will drive substrate solutions from initial concept through tapeout, balancing electrical performance, manufacturability, cost, and schedule requirements.

This role offers the opportunity to influence cutting-edge packaging technologies that support Intel's most advanced products and platforms.

Key Responsibilities

• Design and develop microelectronic package substrates from architecture definition through final tapeout.

• Create and optimize physical package layouts, including high-density routing solutions that meet electrical, mechanical, thermal, and manufacturability requirements.

• Perform substrate feasibility, fit, and routing studies to evaluate design tradeoffs involving performance, complexity, cost, and schedule.

• Define, implement, and maintain substrate design rules while conducting design reviews with internal and external stakeholders.

• Analyze and resolve design rule check (DRC) violations and other layout-related issues to ensure design quality and robustness.

• Collaborate with silicon, package, board, signal integrity, power integrity, and manufacturing teams to optimize pinouts and system-level connectivity.

• Drive continuous improvements in package design methodologies, automation, and best practices.

• Generate and maintain design documentation, technical reports, and engineering deliverables within product lifecycle management systems.

• Support package bring-up, qualification, and debug activities as needed.

Qualifications:

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The Minimum qualificati...

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